This invention relates to a method of making semiconductor substrates for production of nitride semiconductor devices. The semiconductor substrates made by the method of the invention are currently believed to be best suited for production of light-emitting diodes (LEDs), high-electron-mobility transistors (HEMTs), and field-effect transistors (FETs), among other devices.
Nitride semiconductor devices are formed on semiconductor substrates or dice cut from a wafer. Each such substrate comprises a baseplate or substrate proper of either sapphire, silicon carbide, or silicon, and a lamination or of nitride semiconductor layers grown epitaxially on the baseplate. Of the listed baseplate materials, sapphire and silicon carbide are so expensive that silicon is now used preferentially, as taught in Japanese Unexamined Patent Publication No. 2003-59948.
There have been difficulties left unresolved with the semiconductor substrates of the prior art construction outlined above. The silicon baseplate or substrate proper and the nitride semiconductor region thereon have an inconveniently great difference in coefficient of linear expansion, such that dislocations were easy to occur in the nitride semiconductor region. Too many dislocations taking place in the nitride semiconductor region led to such deficiencies in performance as a drop in the efficiency of light emission (in the case of an LED) and a rise in current leakage.
A remedy to this problem is also found in the Japanese patent application cited above, which teaches an interposition of a multilayered buffer region between the silicon substrate and the nitride semiconductor region. Highly capable of stress mitigation, the buffer region proved conducive to the reduction of cracks and dislocations in the nitride semiconductor region.
Further reduction of dislocations have nevertheless been desired in the semiconductor and allied industries for provision of semiconductor devices of still higher performance characteristics. Japanese Unexamined Patent Publication No. 10-312971 represents a conventional approach to this objective. It proposes to grow by epitaxy a layer of a Group III–V compound semiconductor such as gallium nitride on a substrate via a patterned mask of silicon dioxide or the like. Epitaxial growth proceeds not only in a direction normal to the baseplate surface but parallel thereto as well, with the result that a flat-surfaced gallium nitride layer is grown on the masked substrate. Little or no dislocations occur in those parts of the gallium nitride layer which overlie other than the windows in the mask, so that the overall dislocation density of this layer is significantly curtailed. This approach is still unsatisfactory because of the costs and labor associated with the production of the mask.
Another approach is found in Japanese Unexamined Patent Publication No. 2002-343728, teaching to create a gallium nitride layer on a substrate proper and to cover the gallium nitride layer with a metal layer formed as by vapor deposition. Then a multiplicity of cavities are thermally created in the gallium nitride layer, and a gallium nitride layer is again grown by epitaxy. This approach is also objectionable by reason of the complex and costly method of manufacture involving use of the two different fabrication processes of epitaxy and vapor deposition.
Hereinafter in this specification the term “baseplate proper” will be used to refer to the growth substrate or substrate proper for growing semiconductors thereon. The term “baseplate system” will then refer to the combination of the baseplate and the buffer region thereon. The term “substrate system” will then refer to the combination of the baseplate, the buffer region thereon, and the main semiconductor region of one or more layers. The substrate system might also be termed a semiconductor body or wafer or chip.